![Does anyone know why this VHDL code is not counting on my FPGA? The 7-segment is stuck on "0". So I am assuming it is not making it to the second count Does anyone know why this VHDL code is not counting on my FPGA? The 7-segment is stuck on "0". So I am assuming it is not making it to the second count](https://preview.redd.it/does-anyone-know-why-this-vhdl-code-is-not-counting-on-my-v0-3uju1j6xm64a1.png?auto=webp&s=9095f5907457c3b788d495474164595aab1403e7)
Does anyone know why this VHDL code is not counting on my FPGA? The 7-segment is stuck on "0". So I am assuming it is not making it to the second count
![Behavioural VHDL code for T Flip-Flop/ VHDL code for toggle flip flop/ behavioural description for t - YouTube Behavioural VHDL code for T Flip-Flop/ VHDL code for toggle flip flop/ behavioural description for t - YouTube](https://i.ytimg.com/vi/XDaFDEjWxbI/maxresdefault.jpg)
Behavioural VHDL code for T Flip-Flop/ VHDL code for toggle flip flop/ behavioural description for t - YouTube
![8.4 Flip-Flops - Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL [Book] 8.4 Flip-Flops - Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL [Book]](https://www.oreilly.com/api/v2/epubs/9780470900550/files/images/ch008-f013.jpg)